1. Field of the Invention
The present invention relates to an apparatus for providing a jittered clock signal and to an apparatus for providing a random bit and, in particular, to an apparatus for providing a jittered clock signal and an apparatus for providing a random bit, which comprise a diode.
2. Description of the Related Art
The expanding field of digital communication requires solutions for securing data which is stored and transferred to and from a digital communication system. Cryptographic algorithms that require a high quality random number source are widely used in communication systems and especially in Smart Cards. Random numbers are used for secret keys, signatures, authentication protocols, padding bytes or blinding values. Typically, a Smart Card micro-controller features a truly random number generator among its peripheral devices. Even modern motherboards or PCs comprise a security device, which includes a random number generator.
According to the prior art, direct amplification of a noise source from a non-deterministic natural source, like electronic noise or radioactive decay, jittered oscillator sampling and discrete-time chaotic maps are widely exploited for generating a random stream. Such techniques are often combined in order to improve a near-random behaviour of a particular random stream generating technique.
The paper “A high-speed oscillator-based truly random number generator”, M. Bucci, L. Germani, R. Luzzi, A. Trifiletti, M. Varanonuovo, IEEE Trans. Computers, Vol. 52, No. 4, pp. 403–409, Apr. 2003 describes a truly random number generator which exploits the jittered oscillator technique, where a sampling oscillator is provided with an amplified noise source in order to achieve a high jitter to mean period ratio.
The paper “A high-speed truly IC random number of source for Smart Card microcontrollers”, M. Bucci, L. Germani, R. Luzzi, P. Tommasino, A. Trifiletti, M. Varanonuovo, Proc. gth IEEE International Conf. On Electronics, Circuits and Systems (ICECS 2002), pp. 239–242, Sep. 2002 presents a design of a very high-speed thermal noise-based mixed-signal random number generator, which features a near-random behaviour for clock frequencies up to 80 MHz. The proposed random number generator is based on an amplification of thermal noise from integrated resistors. The amplified noise is compared to a reference voltage by a clocked comparator whose output is random bit-streamed.
The noise-based random number generation technique is the most popular technique for generating a random stream. Nevertheless, the lack of adequate shielding from power supply and substrate signals in an integrated circuit environment prohibits the exclusive use of this method for integrated circuit-based cryptographic systems. Published random number generator designs using ring oscillators report that typical levels of oscillator jitter are not nearly sufficient to produce statistical randomness. Consequently, pseudo-random techniques are added to further randomise the output. The same is true for discrete-time chaos systems that can be electronically implemented using discrete-time analogue signal processing techniques.
Therefore, the paper “A noise-based IC random number generator for applications in cryptography”, C. S. Petrie, J. A. Connelly, IEEE Trans. Circuits and Systems 1, Vol. 47, No. 5, pp. 615–621, May 2000 proposes a combination of direct amplification, oscillator sampling and discrete-time chaos, for a random number generating system. Amplified thermal noise is summed into an analogue-digital-based chaotic system that is used to drive a current-controlled oscillator. The current-controlled-oscillator output is assembled at a lower, user-defined clock frequency using a data flip-flop. Due to the combination of three techniques for generating a random stream, the architecture is very complex.